Visual programming for not programmers

Expander digital outputs (the shift register)
chip 74HC595

Block is used to ensure possibility of application of the draft IC 74HC595 which is a shift register running on the SPI bus. The logic levels applied to the input of block will appear at the outputs of the chip. Circuits can be connected in a cascade, thanks to the number of outputs can be increased by a significant amount. In the block settings, you should select the pin to which is connected the control input of the chip and number of chips in cascade.

The Pinout of the chip

The pins of the chip are assigned as follows:

Vcc — power, 2 to 6 In
GND — ground
QA-QH — these findings correspond to the bits recorded in the SPI
SI — slave input, MOSI (SPI)
G — Output Enabe; when this pin is low level, the findings included
(connected to the "latches") when high — the findings are transferred to
state Hi-Z
RCK — latch, SS (SPI); if you set a low-level insights register
SCK — clock input, SCLK (SPI)
SCLR Shift Register Clear Input; if this pin is low level,
clears all triggers on the clock edge at SCLK.
From our point of view it is banal RESET: pinned to earth
reset all register bits
QH — this output will receive the senior transferred to bits

Wiring diagram for a single chip

Connection diagram of the cascade